Implementation of a 32-bit dual core ARM7 microprocessor with single level cache

Shared-memory multiprocessors have become a cost-effective way of providing increased computing power and speed, mainly because they utilize low-cost microprocessors interconnected with shared memory modules. However, memory access tends to become a performance bottleneck due to multiple processors...

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Bibliographic Details
Main Author: Castro, Janelle Legaspi
Other Authors: Lomibao, Love Tulagan, Santos, Aaron Peter Paul Catuncan, Tolledo, Mark Neptaly Timajo
Format: Thesis
Language:English
Published: 2008.
Subjects: