Digital logic design using Verilog coding and RTL synthesis

Digital logic design using Verilog coding and RTL synthesis

Bibliographic Details
Main Author: Taraate, Vaibbhav (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic Resource
Language:English
Published: New Delhi Springer India [2016]
Subjects:
Logic design > Data processing.
Verilog (Computer hardware description language)
Electronic books.
Online Access:Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy