Showing 1 - 2 results of 2 for search 'Luna, Anne Lorraine S.', query time: 0.01s
Refine Results
-
1
A method for timing closure in supply voltage scaled CMOS digital circuits with dual-Vth devices by Luna, Anne Lorraine S.
Published 2013Call Number: loading...
Located: loading...Thesis loading... -
2
Implementation of the complete ARM7TDMI-S instruction set on a debug-capable core by Luna, Anne Lorraine S.
Call Number: loading...
Located: loading...Thesis loading...